Research Institutions in India

Ahmedabad

Indian Institute of Management
Institute for Plasma Research
Physical Research Laboratory

Allahabad

Harish Chandra Research Institute

Bangalore

Central Power Research Institute
Center for Artificial Intelligence and Robotics
Centre for Mathematical Modelling and Computer Simulation (CSIR)
Indian Academy of Science
Indian Institute of Management
Indian Institute of Science
Indian Space Research Organisation (ISRO)
ISRO Satellite Centre
Jawaharlal Nehru Centre for Astronomy and Astrophysics
Jawaharlal Nehru Centre for Advanced Scientific Research
National Aerospace Laboratories
National Centre for Biological Sciences
National Institute of Mental Health and Neuro Sciences
Raman Research Institute

Barrackpore (W. B.)

Central Inland Capture Fisheries Research Institute

Bhopal

Central Institute of Agricultural Engineering

Bhubaneswar

Institute of Physics
Regional Research Laboratory

Calcutta

Indian Institute of Management
Indian Statistical Institute
Inter University Consortium on DAE Facilities
Saha Institute of Nuclear Physics
S.N.Bose National Center for Basic Sciences
Variable Energy Cyclotron Center

Chandigarh

Post Graduate Institute of Medical Education and Research

Chennai (Madras)

Central Electrochemical Research Institute (CECRI- Karaikudi)
Central Institute of Brackishwater Aquaculture
Indian Institute of Technology
Indira Gandhi Center for Atomic Research, Kalpakkam
The Institute of Mathematical Sciences
M. S. Swaminathan Research Foundation
National Centre for Ultrafast Processes
National Institute of Ocean Technology
SPIC Science Foundation
Structural Engineering Research Centre

Delhi

Central Council for Research in Homoeopathy
Council of Scientific and Industrial Research
CSIR Human Resources Development Group
Defence Research and Development Organisation
Indian Council of Agricultural Research
Directorate of Wheat Research
Indian Council of Medical Research (ICMR)
Indian Council for Research on International Economic Relations
Indian Institute of Technology
Institute of Genomics and Integrative Biology
International Centre for Genetic Engineering and Biotechnology
National Brain Research Centre
National Bureau of Plant Genetic Resources
National Centre for Agricultural Economics and Policy Research
Nuclear Science Centre
Science and Engineering Research Council
The Energy and Resources Institute (TERI)
Petroleum Conservation Research Association

Dehradun

Forest Research Institute
Indian Institute of Petroleum
Wildlife Institute of India

Dirang (Arunachal Pradesh)

National Research Centre on Yak

Durgapur

Central Mechanical Engineering Research Institute

Eluru (A. P.)

National Research Centre for Oil Palm

Gadanki

National Atmospheric Research Laboratory

Gandhi Nagar

Institute for Plasma Research

Goa

National Institute of Oceanography

Hyderabad

Centre for Cellular and Molecular Biology
Environment Protection Training and Research Institute
International Crops Research Institute for the Semi-Arid Tropics (ICRISAT), Patancheru
National Geophysical Research Institute
Indian Institute of Chemical Technology

Indore

Center for Advanced Technology

Jammu

Regional Research Laboratory

Jhansi (U. P)

National Research Centre for Agroforestry

Jodhpur (Rajasthan)

Central Arid Zone Research Institute

Kanpur

Indian Institute of Pulses Research
Indian Institute of Technology

Kasaragod

Central Plantation Crops Research Institute

Kharagpur

Indian Institute of Technology

Kochi

Central Marine Fisheries Research Institute

Lucknow

Central Drug Research Institute
Indian Council of Philosophy Research
Indian Institute of Management
Industrial Toxicology Research Centre
National Botanical Research Institute
National Research Laboratory for Conservation of Cultural Property

Mathura

Central Institute for Research on Goats

Mumbai (Bombay)

Bhabha Atomic Research Centre
Centre for Monitoring the Indian Economy
Indian Institute of Geomagnetism
Indian Institute of Technology
Indira Gandhi Institute of Development Research
National Centre for Software Technology
Society for Applied Microwave Electronic Engineering and Research
Tata Insitute of Fundamental Research

Palakkad

Fluid Control Research Institute

Palampur (H.P.)

Institute of Himalayan Bioresource Technology

Peechi

Kerala Forest Research Institute

Pilani

Central Electronics Research Institute
Birla Institute of Technology and Science

Puttur (Karnataka)

National Research Centre on Cashew

Pune

Agharkar Research Institute
Bioinformatics Distributed Information Centre
Centre for Development of Advanced Computing
Inter-University Center for Astronomy and Astrophysics
National Chemical Laboratory

Roorkie (U. P.)

Central Building Research Institute

Trivandrum (Thiruvananthapuram)

Centre for Development Studies
Centre for Earth Science Studies
Electronic Research and Development Centre
National Transportation Planning and Research Centre
Rajiv Gandhi Centre for Biotechnology
Regional Research Laboratory (CSIR), Trivandrum
Sree Chitra Tirunal Institute of Medical Sciences and Technology

Varanasi (U. P.)

Indian Institute of Vegetable Research

What is the Jan Lokpal Bill ...?

What is the Jan Lokpal Bill..?

What is the Jan Lokpal Bill, why it's important

Source: http://indiaagainstcorruption.org/
The Jan Lokpal Bill (Citizen's ombudsman Bill) is a draft anti-corruption bill drawn up by prominent civil society activists seeking the appointment of a Jan Lokpal, an independent body that would investigate corruption cases, complete the investigation within a year and envisages trial in the case getting over in the next one year.

Drafted by Justice Santosh Hegde (former Supreme Court Judge and former Lokayukta of Karnataka), Prashant Bhushan (Supreme Court Lawyer) and Arvind Kejriwal (RTI activist), the draft Bill envisages a system where a corrupt person found guilty would go to jail within two years of the complaint being made and his ill-gotten wealth being confiscated. It also seeks power to the Jan Lokpal to prosecute politicians and bureaucrats without government permission.

Retired IPS officer Kiran Bedi and other known people like Swami Agnivesh, Sri Sri Ravi Shankar, Anna Hazare and Mallika Sarabhai are also part of the movement, called India Against Corruption. Its website describes the movement as "an expression of collective anger of people of India against corruption. We have all come together to force/request/persuade/pressurize the Government to enact the Jan Lokpal Bill. We feel that if this Bill were enacted it would create an effective deterrence against corruption."
Anna Hazare, anti-corruption crusader, went on a fast-unto-death in April, demanding that this Bill, drafted by the civil society, be adopted. Four days into his fast, the government agreed to set up a joint committee with an equal number of members from the government and civil society side to draft the Lokpal Bill together. The two sides met several times but could not agree on fundamental elements like including the PM under the purview of the Lokpal. Eventually, both sides drafted their own version of the Bill.

The government has introduced its version in Parliament in this session. Team Anna is up in arms and calls the government version the "Joke Pal Bill." Anna Hazare declared that he would begin another fast in Delhi on August 16. Hours before he was to begin his hunger strike, the Delhi Police detained and later arrested him. There are widespread protests all over the country against his arrest.        

The website of the India Against Corruption movement calls the Lokpal Bill of the government an "eyewash" and has on it a critique of that government Bill.

A look at the salient features of Jan Lokpal Bill:

1. An institution called LOKPAL at the centre and LOKAYUKTA in each state will be set up

2. Like Supreme Court and Election Commission, they will be completely independent of the governments. No minister or bureaucrat will be able to influence their investigations.

3. Cases against corrupt people will not linger on for years anymore: Investigations in any case will have to be completed in one year. Trial should be completed in next one year so that the corrupt politician, officer or judge is sent to jail within two years.

4. The loss that a corrupt person caused to the government will be recovered at the time of conviction.

5. How will it help a common citizen: If any work of any citizen is not done in prescribed time in any government office, Lokpal will impose financial penalty on guilty officers, which will be given as compensation to the complainant.

6. So, you could approach Lokpal if your ration card or passport or voter card is not being made or if police is not registering your case or any other work is not being done in prescribed time. Lokpal will have to get it done in a month's time. You could also report any case of corruption to Lokpal like ration being siphoned off, poor quality roads been constructed or panchayat funds being siphoned off. Lokpal will have to complete its investigations in a year, trial will be over in next one year and the guilty will go to jail within two years.

7. But won't the government appoint corrupt and weak people as Lokpal members? That won't be possible because its members will be selected by judges, citizens and constitutional authorities and not by politicians, through a completely transparent and participatory process.

8. What if some officer in Lokpal becomes corrupt? The entire functioning of Lokpal/ Lokayukta will be completely transparent. Any complaint against any officer of Lokpal shall be investigated and the officer dismissed within two months.

9. What will happen to existing anti-corruption agencies? CVC, departmental vigilance and anti-corruption branch of CBI will be merged into Lokpal. Lokpal will have complete powers and machinery to independently investigate and prosecute any officer, judge or politician.

10. It will be the duty of the Lokpal to provide protection to those who are being victimized for raising their voice against corruption.

Union Bank Of India Credit Officer Exam 2011 Admit Card / Call Letter download

Union Bank Of India Credit Officer Exam 2011 Admit Card / Call Letter download

Union Bank Of India Credit Officer Recruitment Exam Will Hold At 13-11-2011. Candidates Can Download Their Admit Card Of Credit Officer Exam. Candidates Must Have Their Registration No. For Download Admit Card Of Credit Officer. Candidates Can Download Their Admit Card / Call Letter By Clicking On The Given Link.
Check
The UBI Credit Officer Recruitment Exam Admit Card: Admit Card

http://www.unitedbankofindia.com/English/Recruitment.aspx

RPSC School Lecturers Exam 2011 Admit Card / Call Letter Download

RPSC School Lecturers Exam 2011 Admit Card / Call Letter Download

Rpsc School Lecturers Exam Date Will Announce In Some Days. School Lecturers Exam Will Conducts For Different Subjects (Commerce, Maths, Physics, Chemistry, English, Urdu, Biology). Candidates Can Download Their Admit Card From Official Website Of RPSC. Candidates Must Have Their Application Id, Token No. And Password / Mobile No. For Download Admit Card. Candidates Can Download Their Admit Card By Entering Challan No. And Date Of Birth. Candidates Can Download Their Admit Card By Click On The Given Link.
Download Admit Card: Admit Card
http://rpsconline.rajasthan.gov.in/admissionCard
More Info For Admit Card: Admit Card Information

http://www.rpsc.gov.in/

Haryana TET Exam's Result -2011

HTET 2011 Exam Was Held For Teachers And Lecturers. Haryana TET Exam 2011 Result Will be Declared In Some Days.

 Result Will Declare At The Official Website Of HBSC. When The Result Will Declare Then The Link Will Appear Here.

 Candidates Can Check Their HTET Result Here. 

Click The Link To Check The HTET Reult: HTET Result

UPSC-Special Class Railway Apprentices' Examination (SCRA), 2012

Special Class Railway Apprentices' Examination (SCRA), 2012

The Union Public Service Commission (UPSC) will hold the Special Class
Railway Apprentices' Examination (SCRA), 2012 on 29/01/2012 for
recruitment to the Special Class Apprentices in the Mechanical
Department of Indian Railways.
Eligibility:
Age : Not less than 17 years and not more than 21 years as on
1/1/2011. The upper age is relaxable for SC/ST/OBC and certain other
categories of candidates to the extent specified in the Notice.
Educational Qualification: Must have passes in the first or second
division, The intermediate or an equivalent examination (10+2) of a
University /Board approved by the Government of India with Mathematics
and at least one of the subjects Physics and Chemistry as subjects of
the examination.
Physical Standards: Candidates must be physically fit according to the
Regulations given in notice.
Fee: Rs.100/- to be deposted either in any branch of SBI by cash or by
using net banking of SBI or by credit / debit card. (SC/ST/PH/Female
candidates are exempted from payment.

How To Apply: All applications must apply Online at UPSC website
http://www.upsconline.gov.in up to 21/11/2011.

Candidates can obtain details of the examination and can get
information about registration of their applications, venues of the
examination and syllabus etc at the website of the UPSC at
http://upsc.gov.in or should see Employment News dated 22-28 October
2011

PGECET 2011 Counseling, Seats Allotment, Certificates Verification for M.Tech and M.Pharmacy

PGECET 2011 Counseling, Seats Allotment, Certificates Verification for M.Tech and M.Pharmacy

Update on 30th August 2011: PGECET 2011 Counseling will be conducted during 9th - 10th September 2011. APSCHE Chairman has announced these dates and official notification will be released in 3-4 days. Candidates can exercise web options at any helpline center for admission into M.Tech courses. Seat Allotments will be done as per the schedule given in the notification. Candidates can download allotment order from www.appgecet.nic.in OR http://www.apschepgecet.net/ . Osmania University has conducted the PGECET 2011 for the academic year 2011-12.

Andhra Pradesh State Council of Higher Education (APSCHE) will conduct PGECET Counseling 2011 for admission into M.Tech, Pharm D and M.Pharmacy Courses for the academic year 2011-12. All the seats in above courses at Govt. and Private Engineering and Pharmacy colleges will be filled through PGECET Online Counseling 2011. The Counseling process is likely to start from 29th August 2011. Candidates have to attend for certificate verification and exercise web options as part of the counseling process. Seats will be allotted as per the dates and time given in the counseling notification to be released soon. Candidates can download allotment order also from the official website of PGECET at www.appgecet.nic.in . Detailed schedule for certificate verification and web options will be update here after the release of notification.

Certificates to be produced at verification centers / helpline centers by the candidates:

1. B.Tech./ M.Sc./ MBBS/ BDS/ B.Sc. Agriculture, B.V.Sc. or other relevant Degree Marks Memos
2. Intermediate Memo cum Pass certificates
3. S.S.C. Marks list for Date of Birth proof.
4. Study Certificates from Relevant Degree to Tenth Class,
5. Residential certificate in case of non local candidate.
6. Income certificate issued by Govt. of AP after 01-01-2010

Tuition Fee per Year:

1. University Engineering and Pharmacy Colleges: M.Pharmacy Rs. 15000-25000 ; All other like ME/ M.Tech./ M. Arch./ M.Planning Rs. 15000-25000
2. University Colleges Under Self Finance: M.Pharmacy Rs. 110000; ME/ M.Tech./ M. Arch./ M.Planning Rs. 57000
3. Private Unaided Engineering and Pharmacy Colleges: Pharm D: Rs 68000 ; M.Pharmacy Rs. 110000; ME/ M.Tech./ M. Arch./ M.Planning Rs. 57000

Note: Candidates whose parental income is less than Rs.100000 will be exempted from payment of Tuition Fee subject to conditions issued by the Govt. of Andhra Pradesh time to time. Details of Helpline Centers and other info will be displayed on appgecet.nic.in

Google doodle on Art Clokey's 90th birth day....

from http://en.wikipedia.org/wiki/Art_Clokey

about Art Clokey
Arthur "Art" Clokey (October 12, 1921 - January 8, 2010) was a pioneer
in the popularization of stop motion clay animation, beginning in 1955
with a film experiment called Gumbasia, influenced by his professor,
Slavko Vorkapich, at the University of Southern California.[citation
needed].

From the Gumbasia project, Art Clokey and his wife Ruth invented
Gumby. Since then Gumby and his horse Pokey have been a familiar
presence on television, appearing in several series beginning with the
Howdy Doody Show and later The Adventures of Gumby. The characters
enjoyed a renewal of interest in the 1980s when American actor and
comedian Eddie Murphy parodied Gumby in a skit on Saturday Night Live.
In the 1990s Gumby: The Moviewas released, sparking even more
interest.

Clokey's second most famous production is the duo of Davey and
Goliath, funded by the Lutheran Church in America. In honor for his
contribution to clay animation Google doodle of October 12,2011 was
based on his animated clay characters.

List of Verilog Simulators in Alphabetical Order by Name

source:http://en.wikipedia.org/wiki/

List of Verilog Simulators in Alphabetical Order by Name

Simulator Name	Author/Company	Languages	Description
Active-HDL/Riviera	Aldec	VHDL-2002, V2001, SV2005	A simulator with complete design environment aimed at FPGA-applications. Aldec licenses Active-HDL to FPGA-vendors, and the underlying engine can be found in the design-suites of those vendors. While ActiveHDL is a low-cost product, Aldec also offers a more expensive, higher-performance simulator called "Riviera."
Quartus II Simulator	Altera	VHDL-1993, V2001, SV2005	Altera's simulator bundled with the Quartus II design software. Supports Verilog, VHDL and AHDL.
Verilog-XL	Cadence	V1995	The original Verilog simulator, Gateway Design's Verilog-XL was the first (and only, for a time) Verilog simulator to be qualified for ASIC (validation) sign-off. After its acquisition by Cadence Design Systems, Verilog-XL changed very little over the years, retaining an interpreted language engine, and freezing language-support at Verilog-1995. Cadence recommends Incisive Enterprise Simulator for new design projects, as XL no longer receives active development. Nevertheless, XL continues to find use in companies with large codebases of legacy Verilog. Many early Verilog codebases will only simulate properly in Verilog-XL, due to variation in language implementation of other simulators.
Speedsim	Cadence Design Systems	V1995	Cycle based simulator originally developed at DEC. The DEC developers spun off to form Quickturn Design Systems. Quickturn was later acquired by Cadence, who discontinued the product in 2005. Speedsim featured an innovative slotted bit-slice architecture that supported simulation of up to 32 tests in parallel.
Incisive Enterprise Simulator('big 3')	Cadence Design Systems	VHDL-2002, V2001, SV2005	Cadence initially acquired Gateway Design, thereby acquiring Verilog-XL. In response to competition from faster simulators, Cadence developed its own compiled-language simulator, NC-Verilog. The modern version of the NCsim family, called Incisive Enterprise Simulator, includes Verilog, VHDL, and SystemVerilog support. It also provides support for the e verification language, and a fast SystemC simulation kernel.
SMASH	Dolphin Integration	V1995, V2001, VHDL-1993	SMASH is a mixed-signal, multi-language simulator for IC or PCB designs. It uses SPICE syntax for analog descriptions, Verilog-HDL and VHDL for digital, Verilog-A/AMS, VHDL-AMS and ABCD (a combination of SPICE and C) for analog behavioral, and C for DSP algorithms.
Super-FinSim	Fintronic	V2001	This simulator is available on multi-platform, claiming IEEE 1364-2001 compliance.
PureSpeed	Frontline	V1995	The simulator had a cycle-based counterpart called 'pure cycle'. FrontLine was sold to Avant!, which was later acquired by Synopsys. Synopsys discontinued Purespeed in favor of its well-established VCS simulator.
ModelSim('big 3')	Mentor Graphics	VHDL-2002, V2001, SV2005	The original Modeltech (VHDL) simulator was the first mixed-language simulator capable of simulating VHDL and Verilog design entities together. However, as the Verilog component of ModelSim is neither the fastest nor most fully featured simulator on the market, competition from Synopsys and Cadence, led to a continual decrease in ModelSim popularity.
SILOS	Simucad Design Automation	V2001	As one of the low-cost interpreted Verilog simulators, Silos III enjoyed great popularity in the 1990s. Simucad's most current version, Silos-X, is sold as part of a tool-suite.
Veritak	Sugawara Systems	V2001	It is low-cost and Windows-based only. It boasts a built-in waveform viewer and fast execution.
Verilogger Extreme,Verilogger Pro	SynaptiCAD	V2001,V1995	Verilogger Pro is a low-cost interpreted simulator based on Elliot Mednick's VeriWell code base. Verilogger Extreme is a newer, compiled-code simulator that is Verilog-2001 compliant and much faster than Pro.
VCS	Synopsys	VHDL-2002, V2001, SV2005	Originally developed by John Sanguinetti, Peter Eichenberger and Michael McNamara under the startup company Chronologic Simulation, VCS (Verilog Compiled code Simulator) was purchased by Synopsys, where development continued. Due to a strategic decision to support SystemVerilog (instead of SystemC), and the acquisition of Superlog (the forerunner to SystemVerilog), Synopsys/VCS was the first SystemVerilog simulator in the market.
CVC	Tachyon Design Automation	V2001, V2005	CVC is a Verilog HDL compiled simulator. CVC has the ability to simulate in either interpreted or compiled mode.
Z01X	WinterLogic	V2001,SV2005	Developed as a fault simulator but can also be used as a logic simulator.
ISE Simulator	Xilinx	VHDL-93, V2001	Xilinx's simulator comes bundled with the ISE Design Suite. ISE Simulator (ISim) provides support for mixed-mode language simulation including, but not limited to, simulation of designs targeted for Xilinx's FPGAs and CPLDs.

Some commercial simulators (such as ModelSim) are available in student, or evaluation/demo editions. These editions generally have many features disabled, arbitrary limits on simulation design size, but are offered free of charge.

Caching in ASP.net

Caching

Introduction: It is a way to store the frequently used data into the server memory which can be retrieved very quickly. And so provides both scalability and performance. For example if user is required to fetch the same data from database frequently then the resultant data can be stored into the server memory and later retrieved in very less time (better performance). And the same time the application can serve more page request in the same time (scalability).

Drawback: Suppose the server memory is filled with the data then the remaining part of the data is stored into the disk which slower the complete system performance. That's why self limiting caching techniques are best; where once the server memory gets filled the data has been selectively removed from the server memory to ensure that the application performance is not degraded.

Caching Types: Basically, caching is of two types:

1. Output caching - The rendered html page is stored into the cache before sending it to the client. Now, if the same page is requested by some other client the already rendered htm page is retrieved from the server memory and sent to the client, which saves the time requires rendering and processing the complete page.
2. Data Caching - The important pieces of information, that are time consuming and frequently requested, are stored into the cache. For example a data set retrieved from the database. It is very similar to application state but it is more server friendly as the data gets removed once the cache is filled.

There are two more models which are built on the above two types: 

1. Fragment caching - Instead of caching the complete page, some portion of the rendered html page is cached. E.g.: User Control used into the page is cached and so it doesn't get loaded every time the page is rendered. 
2. Data Source Caching - It is caching built into the data source controls (eg. XmlDataSource, sqlDataSource etc). It is very similar to data caching but here the caching is not handled explicitly but the data source control manages it as per the settings made on the data controls. 

this is from http://wiki.asp.net/page.aspx/655/caching-in-aspnet/

AIEEE 2012 Notification, Applications, Online Exam, Key, Results, Cut Off Info

AIEEE 2012 Notification, Applications, Online Exam, Key, Results, Cut Off Info

Here comes the dates of AIEEE 2012. The Central Board of Secondary Education has announced the tentative schedule of All India Engineering Entrance Examination (AIEEE) 2012. AIEEE 2012 is a common entrance examination for admission to Engineering, Architecture and Planning Courses in NITs, IIITs, various deemed universities and private and corporate engineering colleges in India. The AIEEE 2012 Examinatin will be conducted on 29th April, 2012. This would be the 11th All India Engineering Entrance Examination. Admission into Bachelor of Technology (B.Tech) / Bachelor of Engineering (BE) or Bachelor of Architecture (B.Arch) courses in the above mentioned institutes will the through AIEEE 2012 scores. Usually about 12 lakhs candidates appear for AIEEE examination every year for an approximately 28000 seats. Following are details of eligibility, application forms availability, AIEEE 2011 cut offs, marks, AIEEE 2012 exam structure, online exam, scheme of exam, Key, Results, Counseling Procedure, best engineering colleges, fee and application procedure:

Eligibility and Qualifications: For Engineering courses, applicants should have qualified in 10 +2 / Intermediate with Mathematics and Physics as main subjects. Candidates should have studies any one subject from Chemistry, Biotechnology, Computer Science and Biology. For B.Architecture and B.Planning courses, applicants should have qualified in Mathematics at 10+2 level and passed with minimum 50 percent of marks. Those appearing for the final year examinations of 10 + 2 also eligible to apply.

AIEEE 2012 Scheme of the Examination: AIEEE 2012 examination will be conducted online. There will be two question papers in the examination. These are: 

1) Paper 1 (For BE/ B.Tech Courses): This is Objective Type Multiple Choice Question paper with equal weightage to Physics, Chemistry and Mathematics subjects.
2) Paper 2 (For B.Arch./ B.Planning courses): This paper will have 3 parts. Following are these details:
a) Mathematics - Part I - Objective Type Questions.
b) Aptitude Test - Part II - Objective Type Questions.
c) Drawing Test - Part III - Objective Type Questions: (These questions are intended to test drawing aptitude of the candidate).

Online Application and Examination procedure of AIEEE 2012: The AIEEE 2012 will be conducted online in selected 22 cities across the country. Online exam is proposed only for BE/ B.Tech courses. Candidates those willing to appear for AIEEE 2012 online exam have to apply online through AIEEE website at www.aieee.nic.in . They have to pay the examination fee through debit / credit card only. Complete details of online application schedule will be announced soon. Key and Results of AIEEE 2012 will be displayed on the official website soon after they were announced by CBSE board. Central Counseling Board will conduct the AIEEE 2012 counseling as per the schedule to be announced after the declaration of AIEEE 2012 results during June 2012.

Important Dates (Tentative):

1. Date of AIEEE 2012 Examination: 29th April 2011.
2. Sale of AIEEE 2012 Application Form: December 2011 to January 2012.
3. Online submission of application forms: November 2011 to January 2011
4. Last date for sale of applications through Syndicate Bank, Regional Offices of the CBSE and other designated institutions: January 2012
5. Declaration of AIEEE 2011 Results: June 2012.

Verilog vs VHDL

Introduction

 

Verilog and VHDL are two industry standard Hardware Description Languages (HDL) that are used in writing programs for electronic integrated circuits (ICs) i.e., ASIC and FPGA. Many system designers face this issue: which HDL language to choose – Verilog or VHDL. The answer is by no means easy or trivial. Both of these languages are widely compared and contrasted without any clearly defined victor. Both of them have their own merits and demerits and have different origins. Both of these languages hold major market shares of hardware description languages being used around the globe. It is difficult to say with certainty which one is better or superior; however, VHDL is older of the two. You can produce robust designs and comprehensive test environments with both languages, for both ASIC and FPGA.  

   

History and Origin of Languages

 

Both Verilog and VHDL have originated from different programming languages and are supported by different schools of thought. VHDL is based on Pascal and Ada, thus characteristics of both of these languages are reflected by VHDL. Verilog, unlike VHDL, is based on C programming language and is relatively new as compared with VHDL. Internet sources claim that Verilog is supported mostly by the HDL programmers with industrial experience and background while VHDL is supported mostly by academic circles.

The development of VHDL was initiated in 1981 by United States Department of Defense (DOD) to address the hardware life cycle crisis. VHDL was developed for US Department of Defense (DOD) to provide a consistent hardware modeling language for documentation of digital hardware designs. It was never meant to design actual hardware; its sole purpose was hardware modeling. Since Verilog HDL was an intellectual property of Gateway Design Automation, which was eventually acquired by Cadence, so to maintain the supposed competitive advantage and distance themselves from any strategic ties to Verilog HDL to avoid any potential competitive control from Cadence, the individual Electronic Design Automation (EDA) companies extended considerable influence, resources and dollars to turn this language into a hardware design language. These same individual EDA companies developed and implemented their own semi-unique versions of the language at different stages of its development and implementation. The reason that these EDA companies did not adopt Verilog HDL is that they all have a basic philosophy which states that they must own all of their core technology which was being violated in case of Verilog as it, being intellectual property of Cadence, was not open to public domain. Besides this the EDA vendors wanted to break Cadence's stranglehold on the software design tool and IC design market by pushing and promoting VHDL, which was an open language. VHDL became IEEE standard 1076 in 1987.VHDL was updated in 1993 and is known today as "IEEE standard 1076 1993".As an IEEE standard, VHDL must undergo a review process every five years or sooner to ensure its ongoing relevance to industry. The first such revision was completed in September 1993.

Unlike VHDL, Verilog has originated from the commercial and industrial world. It was developed as a part of a complete simulation system, which may be utilized for describing digital hardware systems as well. Verilog HDL was launched by Gateway in 1983.Gateway was bought by Cadence in 1989.Cadence had recognized that if Verilog HDL remained a closed language as compared with VHDL the pressures of standardizations would force the industry to VHDL. So Cadence opened Verilog to the public domain in 1991 by officially publishing it. Verilog HDL became IEEE standard in 1995.

source: http://www.fpgarelated.com/showarticle/19.php